The present invention relates to a semiconductor memory device and an operating method thereof, and more particularly, relates to a program method of a semiconductor memory device.
A semiconductor memory device includes memory cell blocks having cell strings. Each of the cell strings includes plural memory cells connected in serial. The cell strings in the memory cell block are disposed in parallel. To increase integrity of the semiconductor memory device, an interval between memory cells included in the same cell string and another interval between memory cells included in different cell strings are reduced.
According as interval between the memory cells reduces, interference between adjoining memory cells may increase when the program operation is performed.
To prevent the interference between adjoining the memory cells, the program operation is performed at a separated unit of cell string. Generally, cell strings disposed in an order of even number are referred to as an even cell string. Cell strings disposed in an order of odd number are defined as an odd cell string. For example, an program operation is usually performed at the odd cell strings after another program operation at the even cell strings. At the even cell strings, an program operation may be performed after another program operation at the odd cell strings.
Hereinafter, an program operation will be described in a case when the program operation is performed at the odd cell strings after another program operation is performed at the even cell strings.
When a program operation starts, an erase operation is performed in selected memory cell block. Subsequently, the program operation is performed at the even cell strings under the condition that every memory cell included in odd cell strings maintains erase state. Then, when another program operation is performed at the odd cell strings, most of memory cells included in the even cell strings are already programmed. Accordingly, amount of interference between adjoining memory cells or adjacent cell strings may be different based on which the program operation is performed at, the even cell strings or the odd cell strings. Accordingly, program velocity of the even cell strings and the odd cell strings may be different. Threshold voltage distribution of the memory cells included in selected memory cell block may be wide. Thus, reliability of the program operation may be deteriorated.